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  •   74ALVC244PW-118 Datasheet
  •   74ALVC244PW-118 Cross Reference
  •   74ALVC244PW-118 Schematic
  •   74ALVC244PW-118 Distributor
  •   74ALVC244PW-118 Datenblatt
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  •   74ALVC244PW-118 Equivalent
  •   74ALVC244PW-118 Application Notes
  •   74ALVC244PW-118 Data Sheet
  •   74ALVC244PW-118 component
  •   74ALVC244PW-118 Fiche Technique
  •   74ALVC244PW-118 Circuit
  • 74ALVC  -  系列元器件数据手册
    74ALVC244PW-118  -  Octal buffer/line driver; 3-state  -  NXP Semiconductors(PHILIPS)  -  缓冲器


    FEATURES
    · Wide supply voltage range from 1.65 to 3.6 V
    · 3.6 V tolerant inputs/outputs
    · CMOS low power consumption
    · Direct interface with TTL levels (2.7 to 3.6 V)
    · Power-down mode
    · Latch-up performance exceeds 250 mA
    · Complies with JEDEC standard:
    JESD8-7 (1.65 to 1.95 V)
    JESD8-5 (2.3 to 2.7 V)
    JESD8B/JESD36 (2.7 to 3.6 V)
    · ESD protection:
    HBM EIA/JESD22-A114-A exceeds 2000 V
    MM EIA/JESD22-A115-A exceeds 200 V.


    DESCRIPTION
    The 74ALVC244 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families.
    The 74ALVC244 is an octal non-inverting buffer/line driver with 3-state outputs. The 3-state outputs are controlled by the output enable inputs 1OE and 2OE. A HIGH on nOE causes the outputs to assume a high-impedance OFF-state. Schmitt-trigger action at all inputs makes the circuit highly tolerant for slower input rise and fall times.



    点击查看 : 74ALVC244PW-118.pdf   



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