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  •   0W888-002-XTP Datasheet
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  • 0W8  -  系列元器件数据手册
    0W888-002-XTP  -  BelaSigna? 250 - 16 bit Audio Processor, Full Stereo 2-in, 2-out  -  ON Semiconductor  -  音频数字信号处理(DSP)系统


    Introduction
    BelaSigna 250 is a complete programmable audio processing system, designed specifically for ultra-low-power embedded and portable
    digital audio systems. This high-performance chip builds on the architecture and design of BelaSigna 200 to deliver exceptional sound
    quality along with unmatched flexibility.
    BelaSigna 250 incorporates a full audio signal chain, from stereo 16-bit A/D converters or digital interfaces to accept the signal, through
    the fully flexible digital processing architecture, to stereo analog line-level or direct digital power outputs that can connect directly to
    speakers.
    BelaSigna 250 features flexible clocking options and smart power management features including a soft power-down mode. Two DSP
    subsystems operate concurrently: the RCore, which is a fully software programmable DSP core, and the weighted overlap-add (WOLA)
    filterbank coprocessor, which is a dedicated, configurable processor that executes time-frequency domain transforms and other vectorbased
    computations. A full range of other hardware-assisted features, such as audio-targeted DMA complete the system.
    A comprehensive and easy-to-use suite of development tools, hands-on training and full technical support are available to enable rapid
    development and introduction of highly differentiated products in record time.

    Features
    ? Unique parallel-processing architecture: a complete DSP-based, mixed-signal audio system consisting of a 16-bit fully
    programmable dual-Harvard 16-bit DSP core, a patented, high-resolution block floating-point WOLA filterbank coprocessor, and an
    input/output processor (IOP) along with several peripherals and interfaces which optimize the architecture for audio processing
    ? Integrated converters and powered output: minimize need for external components
    ? Ultra-low power consumption: under 5mA at 20MHz to support advanced operations; 1.8V supply voltage
    ? “Smart” power management: including low current standby mode requiring only 0.05mA
    ? Flexible clocking architecture: supports speeds up to 50MHz
    ? Full range of configurable interfaces: including: I2S, PCM, UART, SPI, I2C, TWSS, GPIO
    ? Excellent fidelity: 88dB system dynamic range, exceptionally low system noise and low group delay
    ? Support for IP protection: to prevent unauthorized access to algorithms and data
    ? Packaging: available in CABGA, LFBGA and WLCSP package options



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